This invention relates to solid state physics. More particularly it relates to improved shallow n-type regions and associated electrical contacts in integrated microelectronic circuits, and to improved transistors characterized by low RC time constants and low contact resistance.
The advantages of shallow junctions in solid state microelectronic devices has long been recognized. Shallow n-type silicon regions consisting of uniformly doped and uniformly crystalline silicon can form junctions having a low resistance and a low capacitance. Transistors made with such shallow n-type regions thus are characterized by low power consumption and short switching times. Such regions must be substantially uniformly doped and annealed in order to avoid subsequent current leakage and spiking, and it has been necessary to sputter a barrier layer of refractory metal or to deposit an alloy of silicon, aluminum, and/or copper to protect the junction from diffusing ions during subsequent deposition of contacts and conductors. See, for example, Effect of Emitter Contact on Current Gain of Silicon Bipolar Devices, T. H. Ning et al., IEEE Transactions On Electronic Devices, Vol. Ed-27, No. 11, November 1980.